ST33G1M2(2013) 数据手册 ( 数据表 ) - STMicroelectronics

Description
   The ST33G1M2 is a serial access microcontroller designed for secure mobile applications that incorporates the most recent generation of ARM processors for embedded secure systems. Its SecurCore® SC300™ 32-bit RISC core is built on the Cortex™ M3 core with additional security features to help to protect against advanced forms of attacks.

FEATUREs
Hardware features
• ARM® SecurCore® SC300™ 32-bit RISC core
   cadenced at 25 MHz
• 30 Kbytes of User RAM
• Up to 1280 Kbytes of User Flash memory with
   OTP area
• Asynchronous receiver transmitter supporting
   ISO/IEC 7816-3 T=0 and T=1 protocols (Slave
   mode supported)
• Single Wire Protocol (SWP) Interface for
   communications with NFC router (ETSI
   102-613 compliant)
• Serial peripheral interface (SPI) master/slave
   interface
• Three 16-bit timers with interrupt capability
• Seven general purpose I/Os enabling
   proprietary protocol implementation
• 1.8 V, 3 V and 5 V supply voltage ranges
• External clock frequency from 1 up to 10 MHz
• Current consumption compatible with GSM
   and ETSI specifications
• Power-saving standby state
• Contact assignment compatible with
   ISO/IEC 7816-2
• ESD protection greater than 4 kV (HBM)

Software features
• Secure Flash Loader
• Flash drivers
• MIFARE™ libraries: Classic, DESFire EV1,
   and Plus

APPLICATIONs
ST33G1M2 major applications include:
• Mobile communications (GSM, 3G and CDMA)
• Java Card applications
• Multimedia