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GAL16V8C-7LP 数据手册 ( 数据表 ) - Lattice Semiconductor

GAL16V8B-20LJ image

零件编号
GAL16V8C-7LP

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23 Pages

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Lattice Semiconductor 

DESCRIPTION
The GAL16V8C, at 5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (<100ms) allow the devices to be reprogrammed quickly and efficiently.

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High Performance E2CMOS PLD Generic Array Logic?
PDF
Lattice Semiconductor
High performance E2CMOS PLD generic array logic, 7.5ns
PDF
Lattice Semiconductor
High Performance E2CMOS PLD Generic Array Logic?
PDF
Lattice Semiconductor
High Performance E2CMOS PLD Generic Array Logic?
PDF
Lattice Semiconductor
High Performance E2CMOS PLD Generic Array Logic?
PDF
Lattice Semiconductor
High Performance E2CMOS PLD Generic Array Logic?
PDF
Lattice Semiconductor
High Performance E2CMOS PLD Generic Array Logic?
PDF
Lattice Semiconductor
High Performance E2CMOS PLD Generic Array Logic?
PDF
Lattice Semiconductor
High Performance E2CMOS PLD Generic Array Logic?
PDF
Lattice Semiconductor
High-Speed E2CMOS PLD Generic Array Logic?
PDF
Lattice Semiconductor

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