CS42526(2005_01) 数据手册 ( 数据表 ) - Cirrus Logic

General Description
   The CS42526 codec provides two analog-to-digital and six digital-to-analog delta-sigma converters, as well as an integrated S/PDIF receiver, in a 64-pin LQFP package.
   The CS42526 integrated S/PDIF receiver supports up to eight inputs, clock recovery circuitry and format auto-detection. The internal stereo ADC is capable of independent channel gain control for single-ended or differential analog inputs. All six channels of DAC provide digital volume control and differential analog outputs. The general purpose outputs may be driven high or low, or mapped to a variety of DAC mute controls or ADC overflow indicators.

FEATUREs
● Six 24-bit D/A, two 24-bit A/D Converters
● 114 dB DAC / 114 dB ADC Dynamic Range
● -100 dB THD+N
● System Sampling Rates up to 192 kHz
● S/PDIF Receiver Compatible with EIAJ CP1201
   and IEC-60958
● Recovered S/PDIF Clock or System Clock
   Selection
● 8:2 S/PDIF Input MUX
● ADC High-pass Filter for DC Offset Calibration
● Expandable ADC Channels and One-line Mode
   Support
● Digital Output Volume Control with Soft Ramp
● Digital +/-15dB Input Gain Adjust for ADC
● Differential Analog Architecture
● Supports logic levels between 5 V and 1.8 V.