CS4812 查看數據表（PDF） - Cirrus Logic

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CS4812

Fixed Function Multi-Effects Audio Processor

Cirrus Logic 

CS4812

2. TYPICAL CONNECTION DIAGRAMS

Ferrite Bead

+ 1 µF 0.1 µF

+ 1 µF 0.1 µF

+5 V

A

A

ANALOG

FILTER

ANALOG

FILTER

12 18 88

VA 1..3

86

AIN1L+

87 AIN1L-

90

AIN1R+

91 AIN1R-

D

D

43 65

VD 1..2

AOUT1+ 7

8

AOUT1-

AOUT2+ 9

AOUT2- 10

ANALOG

FILTER

ANALOG

FILTER

Program ROM

or

Serial EEPROM

To Optional

Input and 1 µF

Output Buffers

+ 1 µF

92

CMOUT

0.1 µF

AA

39

OVL

93

0.1 µF

94

CMFILT+

CMFILT-

A

VD

2.2

K

VD2.2

K

DQ

63 SCL/CCLK

Microcontroller

74HC74

RS

Mode/Reset

Circuit

62 SDA/CDOUT

68 AD0/CS

67 AD1/CDIN

71 REQ

47 CLKOUT

69 SPI/I2C

70 SCPM/S

D 72 RST

RESET

Control/

Monitor

Circuitry

41 PIO0

40

PIO1

37

PIO2

35

PIO3

AGND1..4

1113 19 89

A

RS = 33Ω

All unused inputs

should be tied to ground.

CS4812

DGND1..4

42 44 64 66

D

RES-NC 14

RES-NC 15

RES-NC 16

RES-NC 17

RES-NC 20

21

RES-NC

RES-NC 22

RES-NC 23

57

RES-NC

RES-NC 58

RES-NC 59

RES-NC 60

RES-NC 61

RES-NC 95

RES-NC 97

VD

RES-VD 73

RES-DGND 32

RES-DGND 34

RES-DGND 36

38

RES-DGND

RES-DGND 48

RES-DGND 82

RES-DGND 83

RES-DGND 96

D

XTO XTI

46 45

1 MΩ

Optional External

Clock Input instead

of Crystal

39 pF 39 pF

D

D

Figure 5. Typical Connection Diagram, Control Port Slave Mode

14

DS291PP3

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