CS53L32A
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
0.45 0.46 0.47 0.48 0.49 0.5 0.51 0.52 0.53 0.54 0.55
Frequency (normalized to Fs)
Figure 15. High-Rate Transition Band (Detail)
0.3
0.25
0.2
0.15
0.1
0.05
0
-0.05
-0.1
-0.15
-0.2
-0.25
-0.3
0
0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Frequency (normalized to Fs)
Figure 16. High-Rate Passband Ripple
150 Ω 0.47 µF
0.01 µF
AIN_xx
GND
Figure 17. Line Input Test Circuit
LRCK
SCLK
SDATA
Left Channel
Right Channel
MSB -1 -2 -3 -4 -5 +5 +4 +3 +2 +1 LSB
MSB -1 -2 -3 -4 +5 +4 +3 +2 +1 LSB
I2S, up to 24-Bit Data. Data Valid on Rising Edge of
SCLK.
Figure 18. CS53L32A Control Port Mode - Serial Audio Format 0 (I2S)
34
DS513F1