CS89712-CB 查看數據表（PDF） - Cirrus Logic

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CS89712-CB

High-Performance, Low-Power System-on-Chip with 10BASE-T Ethernet Controller

Cirrus Logic 

CS89712

6.4 I/O Buffer Strength & Characteristics

All I/O buffers on the CS89712 are CMOS thresh-

old input bidirectional buffers except the oscillator

and power pads. For signals that are nominally in-

puts, the output buffer is only enabled during pin

test mode. All output buffers are three stated during

system (hi-Z) test mode. All buffers have a stan-

dard CMOS threshold input stage (apart from the

Schmitt-triggered inputs) and CMOS slew-rate-

controlled output stages to reduce system noise.

Table 92 defines the I/O buffer output characteris-

tics which will apply across the full range of tem-

perature and voltage (i.e., these values are for

3.3 V, +70° C).

All propagation delays are specified at 50% VDD to

50% VDD, all rise times are specified as 10% VDD

to 90% VDD and all fall times are specified as 90%

VDD to 10% VDD.

Buffer Type

Drive Current

Address outputs

Non-address outputs

±12 mA

±4 mA

Propagation

Delay (Max)

5

7

Rise Time

(Max)

6

14

Table 92. I/O Buffer Output Characteristics

Fall Time

(Max)

6

14

Load

50 pF

50 pF

162

DS502PP2

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