ST7FMC2N6B6(2004) 查看數據表（PDF） - STMicroelectronics

零件编号

产品描述 (功能)

生产厂家

ST7FMC2N6B6
(Rev.:2004)

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI™

STMicroelectronics 

ST7MC1/ST7MC2

LINSCI SERIAL COMMUNICATION INTERFACE (SCI Mode) (Cont’d)

BAUD RATE REGISTER (SCIBRR)

Read/Write

Reset Value: 0000 0000 (00h)

7

TR dividing factor SCT2 SCT1 SCT0

1

0

0

0

2

0

0

1

0

4

0

1

0

SCP1 SCP0 SCT2 SCT1 SCT0 SCR2 SCR1 SCR0

8

0

1

1

16

1

0

0

Note: When LIN slave mode is disabled, the SCI-

BRR register controls the conventional baud rate

generator.

Bit 7:6= SCP[1:0] First SCI Prescaler

These 2 prescaling bits allow several standard

clock division ranges:

PR Prescaling factor

1

3

4

13

SCP1

0

0

1

1

SCP0

0

1

0

1

32

1

0

1

64

1

1

0

128

1

1

1

Bit 2:0 = SCR[2:0] SCI Receiver rate divider.

These 3 bits, in conjunction with the SCP[1:0] bits

define the total division applied to the bus clock to

yield the receive rate clock in conventional Baud

Rate Generator mode.

RR dividing factor

1

2

SCR2

0

0

SCR1

0

0

SCR0

0

1

Bit 5:3 = SCT[2:0] SCI Transmitter rate divisor

These 3 bits, in conjunction with the SCP1 & SCP0

bits define the total division applied to the bus

clock to yield the transmit rate clock in convention-

al Baud Rate Generator mode.

4

0

1

0

8

0

1

1

16

1

0

0

32

1

0

1

64

1

1

0

128

1

1

1

116/294

1

Share Link: