ST7FMC2N6B6(2004) 查看數據表（PDF） - STMicroelectronics

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ST7FMC2N6B6
(Rev.:2004)

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI™

STMicroelectronics 

ST7MC1/ST7MC2

LINSCI SERIAL COMMUNICATION INTERFACE (SCI Mode) (Cont’d)

Figure 60. SCI Block Diagram (in Conventional Baud Rate Generator Mode)

TDO

RDI

Write

Transmit Data Register (TDR)

Read

(DATA REGISTER) SCIDR

Received Data Register (RDR)

Transmit Shift Register

Receive Shift Register

SCICR1

R8 T8 SCID M WAKE PCE PS PIE

TRANSMIT

CONTROL

WAKE

UP

UNIT

SCICR2

TIE TCIE RIE ILIE TE RE RWU SBK

RECEIVER

CONTROL

RECEIVER

CLOCK

SCISR

TDRE

TC

RDRF IDLE

OR/

LHE

NF

FE

PE

SCI

INTERRUPT

CONTROL

TRANSMITTER

CLOCK

fCPU

/16

/PR

TRANSMITTER RATE

CONTROL

SCIBRR

SCP1SCP0 SCT2 SCT1 SCT0 SCR2 SCR1SCR0

RECEIVER RATE

CONTROL

CONVENTIONAL BAUD RATE GENERATOR

105/294

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