CS8422-DNZR 查看數據表（PDF） - Cirrus Logic

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CS8422-DNZR

24-bit, 192-kHz, Asynchronous Sample Rate Converter with Integrated Digital Audio Interface Receiver

Cirrus Logic 

CS8422

9. Typical base band jitter in accordance with AES-12id-2006 section 3.4.2. Measurements are Time In-

terval Error (TIE) taken with 3rd order 100 Hz to 40 kHz band-pass filter. Measured with Sample Rate

= 48 kHz.

10. OLRCK must remain high for at least 1 OSCLK period and at most 255 OSCLK periods in TDM Mode.

11. In TDM formatted master mode, the TDM_IN pin is not supported.

12. In TDM formatted master mode, the OSCLK frequency is fixed at 256*OLRCK.

I/OLRCK

(input)

tlckd

tlcks

tsckh

tsckl

I/OSCLK

(input)

SDIN

(input)

SDOUT

(output)

tds

tdh

MSB

tdpd

MSB

MSB-1

MSB-1

Figure 1. Non-TDM Slave Mode Timing

tlrckh

OLRCK

(input)

tfss

tfsh

tsckh

tsckl

OSCLK

(input)

TDM_IN

(input)

SDOUT

(output)

tds

tdh

MSB

MSB-1

tdpd

MSB

MSB-1

Figure 2. TDM Slave Mode Timing

I/OLRCK

(output)

tlcks

I/OSCLK

(output)

SDIN

(input)

SDOUT

(output)

tds

tdh

MSB

tdpd

MSB

MSB-1

MSB-1

Figure 3. Non-TDM Master Mode Timing

OLRCK

(output)

OSCLK

(output)

SDOUT

(output)

tfsm

tdpd

MSB

MSB-1

Figure 4. TDM Master Mode Timing

DS692F1

19

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