CS61310 查看數據表（PDF） - Cirrus Logic

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CS61310

T1 Line Interface Unit

Cirrus Logic 

CS61310

Figure 12. Example of Summing of Waveforms

On the secondary of a 1:2 step-up transformer, the

mV/LSB is twice the values stated above. Note that

although the full scale digital input is 3F, it is rec-

ommended that full scale output voltage on the

transformer primary be limited to 2.4 Vpk. At high-

er output voltages, the driver may not drive the re-

quested output voltage.

The amplitude information for all phases is written

via the serial-port to Arbitrary Pulse Shape regis-

ters as described in an earlier section. Each phase

amplitude is written as an eight-bit byte, where the

first phase of the symbol is written first.

In serial-port host mode, the amplitude bytes are

written LSB first. The contents of the Arbitrary

Waveform register can be verified by reading the

Waveform Register.

Diagnostic Mode

Loopback Modes

Local Loopback (LLOOP)

Remote Loopback (RLOOP)

In-band Network Loopback (NLOOP)

Internal Data Pattern Generation and Detection

Transmit All Ones (TAOS)

In-band Loop-up/down Code Generator

Error Detection

Bipolar Violation Detection (BPV)

Alarm Condition Monitoring

Receive Loss of Signal Monitoring (LOS)

Receive Alarm Indication Signal Monitoring (AIS)

Other Diagnostic Reports

Receive Line Attenuation Indicator (LATN)

Availability (Note 1)

H/W Host

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

No

Yes

Yes

Yes

Yes

Yes

No

Yes

Yes

Yes

Host Mode (Note 2)

Maskable

No

No

Yes

No

No

No

Yes

Yes

No

Table 5. CS61310 Diagnostic Mode Availability

Notes: 1. In Hardware Mode the Diagnostic Modes are selected by directly setting the pins on the device; in Host

Mode, the appropriate register bits are written for Diagnostic Modes.

2. In Host Mode the interrupts can be masked by writing a “1” to the LOS bit; there is no masking in the

Hardware Mode.

DS440PP2

17

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