CS61310 查看數據表（PDF） - Cirrus Logic
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CS61310 Datasheet PDF : 30 Pages
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CS61310
2.12.2 Control Register 2: Address 0x11
7 (MSB)
AIS
6
RAMPLSE
5
RSVD
set to “0”
4
LOOPDN
3
LOOPUP
2
RPWDN
1
TxHIZ
0 (LSB)
RSVD
set to “0”
AIS
Alarm Indication Signal.
AIS = 1 when an all ones pattern is present at the receiver. This bit is reset to “0” by the first
read occurring after the AIS condition has cleared.
An interrupt will occur when AIS is present unless a “1” is written to AIS disabling the interrupt.
RAMPLSE
When RAMPLSE = 1, output pulse shapes are determined by the codes in the internal, pro-
grammable, transmit RAM.
LOOPDN
Loop Down
Setting LOOPDN to “1” causes the data pattern 001... to be repetitively transmitted.
LOOPUP
Loop Up
Setting LOOPUP to “1” causes the data pattern 00001... to be repetitively transmitted.
RPWDN
Receiver Power Down
When RPWDN = 1, the receiver circuitry is powered down, but the transmitter is still active.
TxHIZ
Transmitter High Impedance
When TxHIZ = 1 the transmitter goes to a low-power, high-impedance state
RSVD
Reserved. Set to 0 for proper operation.
2.12.3 Equalizer Gain (EQGAIN): Address 0x12
7 (MSB)
6
X
X
5
4
3
2
1
0 (LSB)
X
EQ4
EQ3
EQ2
EQ1
EQ0
EQ[4:0]
The receive equalizer gain settings are broken down into 20 segments and provided at the five
LSBs of this register, EQ4 - EQ0. 00001 corresponds to -2 dB, 10100 corresponds to -40 dB.
The three MSBs are don’t cares.
2.12.4 RAM Address (RAM): Address 0x13
7 (MSB)
RAM.7
6
RAM.6
5
RAM.5
4
RAM.4
3
RAM.3
2
RAM.2
1
RAM.1
0 (LSB)
RAM.0
RAM[7:0]
The RAM address pointer for the arbitrary waveform memory;
a special write procedure must be followed to write the waveform RAM.
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DS440PP2
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