CS7620 查看數據表（PDF） - Cirrus Logic
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CS7620 Datasheet PDF : 70 Pages
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CS7620
4.28 Timing Control - Lines of Exposure in Low Resolution Mode (MSBs)
Default = 06h; Read/Write (address 26h)
Bit Number
Bit Name
Default
7
n_int7
0
6
n_int6
0
5
n_int5
0
4
n_int4
0
3
n_int3
0
2
n_int2
1
1
n_int1
1
0
n_int0
0
Bit
Mnemonic
Function
7
n_int7
Exposure Time in Low Resolution Mode: In low resolution mode, the
6
n_int6
CS7620 continuously outputs data on a frame by frame basis; so it can drive
5
n_int5
a LCD panel in a video mode. In this mode the CS7620 ignores the expose
signal.
4
n_int4
3
n_int3
N_int allows to shorten the exposure time while in low resolution mode.
2
n_int2
N_int controls the amount of time (measured in readout lines) where the CCD
1
n_int1
will be exposed to light. The default is 262, this means that the CCD receives
full exposure during readout. By decreasing n_int, the amount of exposure can
0
n_int0
be decreased. To further increase this exposure time beyond the full 262 lines
of readout time, the n_extra register (23h and 24h) is provided.
4.29 Timing Control - Polarity of Vertical Shift Outputs
Default = FFh; Read/Write (address 28h)
Bit Number
Bit Name
Default
7
v_polarity7
1
6
v_polarity6
1
5
v_polarity5
1
4
v_polarity4
1
3
v_polarity3
1
2
v_polarity2
1
1
v_polarity1
1
0
v_polarity0
1
Bit
Mnemonic
Function
7
v_polarity7
Vertical Signal Polarity: Polarity of each of the eight vertical shift outputs
6
v_polarity6
(V1 V2 V3 V4 S1 S2 S3 S4), where V1 polarity = MSB, S4 polarity = LSB
5
v_polarity5
A “0” indicates that the signal state is low, a “1” indicates that the signal state
4
v_polarity4
is high.
3
v_polarity3
2
v_polarity2
1
v_polarity1
0
v_polarity0
DS301PP2
47
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