CS5581(2007) 查看數據表（PDF） - Cirrus Logic

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CS5581
(Rev.:2007)

±2.5 V / 5 V, 200 kSps, 16-bit, High-throughput ∆Σ ADC

Cirrus Logic 

8/21/07

15:56

CS5581

3.7 Typical Connection Diagrams

The following figure depicts the CS5581 powered from bipolar analog supplies, +2.5 V and - 2.5 V.

+2.048 V

0V

-2.048 V

+2.5 V

+4.096

Voltage

Reference

(NOTE 1)

-2.5 V

49.9

150pF

2k

2200pF

C0G

AIN

ACOM

(V+) Buffers On

BUFEN

(V-) Buffers Off

10 µF

VREF+

0.1 µF

VREF-

CS557811

SMODE

CS

4SCLK

4SDO

RDY

CONV

CAL

BP/UP

RST

MCLK

TST

+2.5 V

+3.3 V to +1.8 V

V1+

10

0.1 µF

0.1 µF

V2+

10

V2-

VL

0.1 µF

0.1 µF

X7R

DCR

VLR2

V1-

-2.5 V

VLR

NOTES

1. See Section 3.4 Voltage Reference for information on required

voltage reference performance criteria.

2.Locate capacitors so as to minimize loop length.

3. The ±2.5 V supplies should also be bypassed to ground at the converter.

4. VLR and the power supply ground for the ±2.5 V should be

connected to the same ground plane under the chip.

5. SCLK and SDO may require pull-down resistors in some applications.

Figure 5. CS5581 Configured Using ±2.5V Analog Supplies

DS796A1

17

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