CS5581(2007) 查看數據表（PDF） - Cirrus Logic

零件编号

产品描述 (功能)

生产厂家

CS5581
(Rev.:2007)

±2.5 V / 5 V, 200 kSps, 16-bit, High-throughput ∆Σ ADC

Cirrus Logic 

8/21/07

15:56

CS5581

3.5 Analog Input

The analog input of the converter is single-ended with an full-scale input of ±2.048 volts. This is illustrated

in Figure 5 and Figure 6. These diagrams also illustrate a differential buffer amplifier configuration for driv-

ing the CS5581.

The capacitors at the outputs of the amplifiers provide a charge reservoir for the dynamic current from the

A/D inputs while the resistors isolate the dynamic current from the amplifier. The amplifiers can be pow-

ered from higher supplies than those used by the A/D but precautions should be taken to ensure that the

op amp output voltage remains within the power supply limits of the A/D, especially under start-up condi-

tions.

3.6 Output Coding Format

The reference voltage directly defines the input voltage range in both the unipolar and bipolar configura-

tions. In the unipolar configuration (BP/UP low), the first code transition occurs 0.5 LSB above zero, and

the final code transition occurs 1.5 LSBs below VREF. In the bipolar configuration (BP/UP high), the first

code transition occurs 0.5 LSB above -VREF and the last transition occurs 1.5 LSBs below +VREF. See

Table 1 for the output coding of the converter.

Table 1. Output Coding, Two’s Complement

Bipolar Input Voltage

>(VREF-1.5 LSB)

VREF-1.5 LSB

-0.5 LSB

-VREF+0.5 LSB

<(-VREF+0.5 LSB)

Two’s

Complement

7F FF

7F FF

7F FE

00 00

FF FF

80 01

80 00

80 00

NOTE: VREF = [(VREF+) - (VREF-)] / 2

Table 2. Output Coding, Offset Binary

Unipolar Input Voltage

>(VREF-1.5 LSB)

VREF-1.5 LSB

(VREF/2)-0.5 LSB

+0.5 LSB

<(+0.5 LSB)

Offset

Binary

FF FF

FF FF

FF FE

80 00

7F FF

00 01

00 00

00 00

NOTE: VREF = [(VREF+) - (VREF-)] / 2

16

DS796A1

Share Link: