CS5560-ISZ 查看數據表（PDF） - Cirrus Logic

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CS5560-ISZ

±2.5 V / 5 V, 50 kSps, 24-bit, High-throughput ∆Σ ADC

Cirrus Logic 

7/31/07

CS5560

3.6 Output Coding Format

The reference voltage directly defines the input voltage range in both the unipolar and bipolar configura-

tions. In the unipolar configuration (BP/UP low), the first code transition occurs 0.5 LSB above zero, and

the final code transition occurs 1.5 LSBs below VREF. In the bipolar configuration (BP/UP high), the first

code transition occurs 0.5 LSB above -VREF and the last transition occurs 1.5 LSBs below +VREF. See

Table 2 for the output coding of the converter.

Table 2. Output Coding, Two’s Complement

Bipolar Input Voltage

>(VREF-1.5 LSB)

VREF-1.5 LSB

-0.5 LSB

-VREF+0.5 LSB

<(-VREF+0.5 LSB)

Two’s

Complement

7F FF FF

7F FF FF

7F FF FE

00 00 00

FF FF FF

80 00 01

80 00 00

80 00 00

NOTE: VREF = (VREF+) - (VREF-)

Table 3. Output Coding, Offset Binary

Unipolar Input Voltage

>(VREF-1.5 LSB)

VREF-1.5 LSB

(VREF/2)-0.5 LSB

+0.5 LSB

<(+0.5 LSB)

Offset

Binary

FF FF FF

FF FF FF

FF FF FE

80 00 00

7F FF FF

00 00 01

00 00 00

00 00 00

NOTE: VREF = (VREF+) - (VREF-)

DS713A5

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