CS5541 查看數據表（PDF） - Cirrus Logic

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CS5541

Low-Power, Low-Voltage, 24-Bit ∆Σ ADC

Cirrus Logic 

2.9 Performing Conversions/Calibrations

The CS5541 offers four conversion/self-calibration

modes (if a user requires system calibration, this

can be accommodated in the system microcontrol-

ler). The first mode allows the user to calibrate con-

tinuously between each conversion. The second

mode allows the user to calibrate once after the

command is issued and then continuously convert

on the channel selected using the calibration result.

The third mode allows the user to skip calibration;

however, it performs conversions with the default

calibration coefficients. The final mode allows the

user to use the previous calibration coefficients to

perform continuous conversions on the channel se-

lected. The sections that follow detail the differenc-

es between the conversion modes. The sections

also explain how to decode the conversion word

into the respective flag and data bits.

2.9.1 Continuous Calibrations and Conver-

sions (reduced output rate)

This mode performs an offset and gain calibration

prior to each conversion. Note that the effective

throughput in this mode is reduced by two as a cal-

ibration is performed prior to each conversion.

Nevertheless, after the first command instructing

the ADC to enter this mode is given, an offset cali-

bration is performed followed by a gain calibration.

Then the first data conversion is performed. Subse-

quent conversions are offset calibration followed

by data conversion. Then, a gain calibration is per-

formed followed by a data conversion. The ADC

repetitively steps through this sequence until a new

command is issued.

Note:

The CS5541 offers self calibration where the

ADC calibrates out offset and gain errors due

to the ADC itself. Calibration in the CS5541 is

used to set the zero and gain slope of the

ADC’s transfer function. For the

self-calibration of offset, the converter

CS5541

internally ties the inputs of the modulator

together and routes them to the VREF- pin as

shown in Figure 12. VREF- must be tied to a

fixed voltage between VA+ and VA-. For

self-calibration of gain, the differential inputs

of the modulator are connected to VREF+

and VREF- as shown in Figure 13. Further

note that each calibration step (offset or gain)

takes one conversion cycle to complete.

However, after the ADC is reset, it is

functional and can perform measurements

without being calibrated (see Perform

Continuous Conversions with Default

Calibration Coefficients section for details). In

this case, the converter will utilize the

initialized values of the on-chip registers

(Offset = 0, Gain = 1.0) to calculate output

words. Any initial offset and gain errors in the

internal circuitry of the chip will remain.

AIN+

+

AIN-

-

VREF-

Figure 12. Self Calibration of Offset.

AIN+

+

AIN-

-

VREF+

Reference +- VREF-

Figure 13. Self Calibration of Gain.

DS500PP1

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