CS5376A(2004) 查看數據表（PDF） - Cirrus Logic
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CS5376A Datasheet PDF : 107 Pages
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SWITCHING CHARACTERISTICS
SPI 1 Interface Timing (External Master)
CS5376A
SSI
MOSI
SCCKLK1
MSB MSB - 1
t1
t2
t3
t4 t5
LSB
t6
Figure 4. MOSI Write Timing in SPI Slave Mode
SS I
MISO
SCCKLK1
MSB MSB - 1
t7
t8 t9
t 10
LSB
Figure 5. MISO Read Timing in SPI Slave Mode
Parameter
MOSI Write Timing
SSI Enable to Valid Latch Clock
Data Set-up Time Prior to SCK1 Rising
Data Hold Time After SCK1 Rising
SCK1 High Time
SCK1 Low Time
SCK1 Falling Prior to SSI Disable
MISO Read Timing
SCK1 Falling to New Data Bit
SCK1 High Time
SCK1 Low Time
SSI Rising to MISO Hi-Z
Symbol Min
Typ
Max Unit
t1
60
-
t2
60
-
t3
120
-
t4
120
-
t5
120
-
t6
60
-
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
t7
-
-
200
ns
t8
120
-
-
ns
t9
120
-
-
ns
t10
-
-
150
ns
15
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