CS5464-IS 查看數據表（PDF） - Cirrus Logic

零件编号

产品描述 (功能)

生产厂家

CS5464-IS

Three-channel, Single-phase Power/Energy IC

Cirrus Logic 

CS5464

INTERRUPT HANDLER ROUTINE:

4) Read the Status Register.

5) Disable all interrupts.

6) Branch to the proper interrupt service routine.

7) Clear the Status Register by writing back the read

value in step 4.

8) Re-enable interrupt

9) Return from interrupt service routine.

This handshaking procedure ensures that any new in-

terrupts activated between steps 4 and 7 are not lost

(cleared) by step 7.

5.13 Serial Port Overview

The CS5464 incorporates a serial port transmit and re-

ceive buffer with a command decoder that interprets

one-byte (8-bit) commands as they are received. There

are four types of commands: instructions, synchroniz-

ing, register writes, and register reads (See Section

5.15 Commands on page 24).

Instructions are one byte in length and will interrupt any

instruction currently executing. Instructions do not affect

register reads currently being transmitted.

Synchronizing commands are one byte in length and

only affect the serial interface. Synchronizing com-

mands do not affect operations currently in progress.

Register writes must be followed by three bytes of data.

Register reads can return up to four bytes of data.

Commands and data are transferred most-significant bit

(MSB) first. Figure 1 on page 12, defines the serial port

timing and required sequence necessary for writing to

and reading from the serial port receive and transmit

buffer, respectively. While reading data from the serial

port, commands and data can be written simultaneous-

ly. Starting a new register read command while data is

being read will terminate the current read in progress.

This is acceptable if the remainder of the current read

data is not needed. During data reads, the serial port re-

quires input data. If a new command and data is not

sent, SYNC0 or SYNC1 must be sent.

5.13.1 Serial Port Interface

The serial port interface is a “4-wire” synchronous serial

communications interface. The interface is enabled to

start excepting SCLKs when CS (Chip Select) is assert-

ed (logic 0). SCLK (Serial bit-clock) is a Schmitt-trigger

input that is used to strobe the data on SDI (Serial Data

In) into the receive buffer and out of the transmit buffer

onto SDO (Serial Data Out).

If the serial port interface becomes unsynchronized with

respect to the SCLK input, any attempt to clock valid

commands into the serial interface may result in unex-

pected operation. Therefor, the serial port interface

must then be re-initialized by one of the following ac-

tions:

- Drive the CS pin high, then low.

- Hardware Reset (drive RESET pin low for at

least 10 µs).

- Issue the Serial Port Initialization Sequence,

which is 3 (or more) SYNC1 command bytes

(0xFF) followed by one SYNC0 command byte

(0xFE).

If a re-synchronization is necessary, it is best to re-ini-

tialize the part either by hardware or software reset

(command 0x80), as the state of the part may be un-

known.

5.14 Register Paging

Read/write commands access one of the 32 registers

within a specified page. By default, Page = 0. To access

registers in another page, the Page Register (address

0x1F) must be written with the desired page number.

0xFFF

ROM

2048 Words

Pages

0x40 - 0x7F

0x800

0x7FF

0x400

0x3FF

Hardware Registers*

32 Pages

Software Register*

32 Pages

Pages

0x20 - 0x3F

Pages

0 - 0x1F

0x000

* Accessed using register read/write commands.

Figure 12. CS5464 Memory Map

Example:

Reading register 6 in page 3.

1. Write 3 to page register with command and data:

0x7E 0x00 0x00 0x03

2. Read register 6 with command:

0x0C 0xFF 0xFF 0xFF

DS682PP1

23

Share Link: