CS5461 查看數據表（PDF） - Cirrus Logic

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CS5461

Single Phase Bi-Directional Power/Energy IC

Cirrus Logic 

CS5461

CRDY

VOR

VSAG

VROR

IROR

EOOR

VOD

IOD

LSD

IC

Conversion Ready. Indicates a new conversion is ready. This will occur at the output word rate.

Voltage Out of Range.

Indicates that the voltage threshold/duration conditions, specified in the VSAGlevel

and VSAGduration Registers, have been met.

RMS Voltage Out of Range. Set when the calibrated RMS voltage value is too large to fit in the

RMS Voltage Register.

RMS Current Out of Range. Set when the calibrated RMS current value is too large to fit in the

RMS Current Register.

EOUT Energy Summation Register Out of Range. Assertion of this bit can be caused by having

a pulse output frequency that is too small for the power being measured. This problem can be

corrected by specifying a higher frequency in the PulseRateE register.

Modulator oscillation detect on the voltage channel. Set when the modulator oscillates due to

an input above Full Scale. Note that the level at which the modulator oscillates is significantly

higher than the voltage channel’s Differential Input Voltage Range.

Modulator oscillation detect on the current channel. Set when the modulator oscillates due to

an input above Full Scale. Note that the level at which the modulator oscillates is significantly

higher than the current channel’s Differential Input Voltage Range.

Note:

The IOD and VOD bits may be ‘falsely’ triggered by very brief voltage spikes from the

power line. This event should not be confused with a DC overload situation at the

inputs, when the IOD and VOD bits will re-assert themselves even after being

cleared, multiple times.

Low Supply Detect. Set when the voltage at the PFMON pin falls below the low-voltage thresh-

old (PMLO), with respect to VA- pin. For a given part, PMLO can be as low as 2.3 V. LSD bit

cannot be permanently reset until the voltage at PFMON pin rises back above the high-voltage

threshold (PMHI), which is typically 100 mV above the device’s low-voltage threshold. PMHI will

never be greater than 2.7 V.

Invalid Command. Normally logic 1. Set to logic 0 if the host interface is strobed with an 8-bit

word that is not recognized as one of the valid commands (see Section 6.1, Commands).

7.11 AC Current Offset Register and AC Voltage Offset Register

Address: 16 (AC Current Offset Register); 17 (AC Voltage Offset Register)

MSB

LSB

2-1

2-2

2-3

2-4

2-5

2-6

2-7

2-8

..... 2-18 2-19 2-20 2-21 2-22 2-23 2-24

Default** = 0x000000

The AC Offset Registers are initialized to zero on reset, allowing for uncalibrated normal operation. When AC

Offset Calibration is performed, the offset register(s) is updated with the square of the system AC offset value.

This sequence lasts ~(6N + 30) A/D conversion cycles (where N is the value of the Cycle-Count Register).

DRDY will be asserted at the end of the calibration. The register value may be read and stored for future system

offset compensation.

DS546F2

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