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CS4525(2008) 查看數據表(PDF) - Cirrus Logic

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CS4525 Datasheet PDF : 98 Pages
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CS4525
charged and discharged. The Popguard technology has no effect on the PWM_SIG outputs nor the aux-
iliary serial output.
+8V to +18V
0.033 uF
VP
RAMP_CAP OUT1
OUT2
CS4525
OUT3
OUT4
Half-
bridge
Filter
Half-
bridge
Filter
Full-
bridge
Filter
Left
Speaker
Right
Speaker
Subwoofer
Figure 19. Popguard Connection Diagram
The PWM Popguard feature is disabled by default; to enable it, the RmpSpd[1:0] register must be set to
any value other than 11. The PWM Popguard feature should only be used when the power outputs are
configured for stereo half-bridge with full-bridge sub per Section 6.1.7.1. The RAMP_CAP pin must be
connected to the VP supply through a 0.033 µF capacitor whenever the PWM Popguard technology is
enabled, as shown in Figure 19.
Typical Ramp Up Times
VP Voltage
12 V
15 V
18 V
RmpSpd[1:0] = 00
2.16 seconds
1.74 seconds
1.40 seconds
RmpSpd[1:0] = 01
2.20 seconds
1.76 seconds
1.42 seconds
RmpSpd[1:0] = 10
2.20 seconds
1.78 seconds
1.44 seconds
RmpSpd[1:0] = 11
Instant (No Ramp)
Instant (No Ramp)
Instant (No Ramp)
Table 9. Typical Ramp Times for Various VP Voltages
The output ramp time will vary depending on the voltage applied to VP and the value of the RmpSpd[1:0]
bits; typical ramp times are listed in Table 9. All output channels are affected by the RmpSpeed[1:0] bits,
and PWM Popguard feature is disabled by default.
Referenced Control
Register Location
RmpSpeed[1:0] ................... “Ramp Speed (RmpSpd[1:0])” on page 75
PDnAll ................................. “Power Down (PDnAll)” on page 89
PDnOutX ............................. “Power Down PWM Power Output X (PDnOutX)” on page 89
6.1.8
Logic-Level PWM Outputs
The CS4525 has two configurable logic-level PWM outputs, PWM_SIG1 and PWM_SIG2. These outputs
can be used as either digital input to an external PWM amplifier such as the CS4412, or as an analog
input to a headphone amplifier or a line-out amplifier.
To eliminate power-up pops when used to supply an external PWM amplifier, the CS4525 implements the
same click-free start-up function on the PWM_SIG outputs as it does for its own powered PWM outputs.
This function can only be utilized if the PWM amplifier has an initial transition delay feature, such as the
CS4412A. To eliminate power-up and power-down pops when used to supply an analog output circuit,
the PWM_SIG outputs support a high-impedance state that is controlled by the HiZPSig bit in the
EQ Config register. This bit is active-low and cleared by default. To use the PWM_SIG outputs, the HiZ-
PSig bit must be set to enable the PWM_SIG output drivers.
46
DS726PP3

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