CL-PS7111
Low-Power System-on-a-Chip
6.3 DC Characteristics
All characteristics are specified at VDD = 2.7 V (± 5%) at 13.0 MHz or 3.3 V (± 10%) at 18.432 MHz, and
VSS = 0 V over an operating temperature of 0°C to +70°C. The current consumption figures relate to typ-
ical conditions at 3.3 V, 18.432-MHz operation with the PLL switched on.
Symbol Parameter
MIN
MAX Units Conditions
VIH
VIL
VT+
VT-
VHST
VOH
VOL
IIN
IOZ
CIN
COUT
CI/O
IDDstartup
CMOS input high voltage
CMOS input low voltage
Schmitt trigger positive going
threshold
Schmitt trigger negative going
threshold
Schmitt trigger hysteresis
CMOS output high voltage
Output drive 1 and 2
Output drive 3 and 4
CMOS output low voltage
Output drive 1 and 2
Output drive 3 and 4
Input leakage current
Output tristate leakage currenta
Input capacitance
Output capacitance
Transceiver capacitance
Start-up current consumption
0.7 × VDD
−0.3
1.52
0.72
0.64
VDD − 0.1
VDD − 1.0
VDD − 1.0
−10
−10
VDD + 0.3
0.2 × VDD
2.26
1.29
1.13
0.1
0.5
0.5
+10
+10
5
5
5
50
Standby current consumption
IDDstandby
20
Idle current consumption
IDDidle
6
IDDoperating Operating current consumption
40
Standby supply voltage
VDDstandby
2.2
V
V
V
V
V VIL to VIH
V
IOH = 0.8 mA
V IOH = 3 mA
V
IOH = 12 mA
V
IOL = -0.8 mA
V IOL = -3 mA
V
IOL = -12 mA
µA VIN = VDD or GND
µA VOUT = VDD or GND
pF
pF
pF
Initial 100 ms from power up,
32-kHz oscillator not stable, POR
µA signal at VIL, all other I/O static,
VIH = VDD ± 0.1 V, VIL = GND ±
0.1 V
Just 32-kHz oscillator running, all
µA other I/O static, VIH = VDD ± 0.1
V, VIL = GND ± 0.1 V
Both oscillators running, CPU
mA static, LCD refresh active, VIH =
VDD ± 0.1 V, VIL = GND ± 0.1 V
mA
All system active, running typical
program
Minimum standby voltage for
V state retention and RTC opera-
tion only
a Assumes buffer has no pull-up or pull-down resistors.
74
ELECTRICAL SPECIFICATIONS
September 1997
PRELIMINARY DATA BOOK v2.0