C8051F93X-C8051F92X 查看數據表（PDF） - Silicon Laboratories

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C8051F93X-C8051F92X

Single/Dual Battery, 0.9–3.6 V, 64/32 kB, SmaRTClock, 10-Bit ADC MCU

Silicon Laboratories 

C8051F93x-C8051F92x

SFR Definition 21.19. P2SKIP: Port2 Skip

Bit

7

6

5

4

3

2

1

0

Name

P2SKIP[7:0]

Type

R/W

Reset

0

0

0

0

0

0

0

0

SFR Page = 0x0; SFR Address = 0xD6

Bit

Name

Description

Read

Write

7:0 P2SKIP[7:0] Port 1 Crossbar Skip Enable Bits.

These bits select Port 2 pins to be skipped by the Crossbar Decoder. Port pins

used for analog, special functions or GPIO should be skipped by the Crossbar.

0: Corresponding P2.n pin is not skipped by the Crossbar.

1: Corresponding P2.n pin is skipped by the Crossbar.

Note: Pins P2.0-P2.6 are only available in 32-pin devices.

SFR Definition 21.20. P2MDIN: Port2 Input Mode

Bit

7

6

5

4

3

2

1

0

Name Reserved

P2MDIN[6:0]

Type

R/W

Reset

1

1

1

1

1

1

1

1

SFR Page = 0x0; SFR Address = 0xF3

Bit

Name

Function

7

Reserved. Read = 1b; Must Write 1b.

6:0 P2MDIN[3:0] Analog Configuration Bits for P2.6–P2.0 (respectively).

Port pins configured for analog mode have their weak pullup and digital receiver

disabled. The digital driver is not explicitly disabled.

0: Corresponding P2.n pin is configured for analog mode.

1: Corresponding P2.n pin is not configured for analog mode.

Note: Pins P2.0-P2.6 are only available in 32-pin devices.

236

Rev. 1.3

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