C8051F93X-C8051F92X 查看數據表（PDF） - Silicon Laboratories

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C8051F93X-C8051F92X

Single/Dual Battery, 0.9–3.6 V, 64/32 kB, SmaRTClock, 10-Bit ADC MCU

Silicon Laboratories 

C8051F93x-C8051F92x

SFR Definition 21.15. P1MDIN: Port1 Input Mode

Bit

7

6

5

4

3

2

1

0

Name

P1MDIN[7:0]

Type

R/W

Reset

1

1

1

1

1

1

1

1

SFR Page = 0x0; SFR Address = 0xF2

Bit

Name

Function

7:0 P1MDIN[7:0] Analog Configuration Bits for P1.7–P1.0 (respectively).

Port pins configured for analog mode have their weak pullup and digital receiver

disabled. The digital driver is not explicitly disabled.

0: Corresponding P1.n pin is configured for analog mode.

1: Corresponding P1.n pin is not configured for analog mode.

Note: Pin P1.7 is only available in 32-pin devices.

SFR Definition 21.16. P1MDOUT: Port1 Output Mode

Bit

7

6

5

4

3

2

1

0

Name

P1MDOUT[7:0]

Type

R/W

Reset

0

0

0

0

0

0

0

0

SFR Page = 0x0; SFR Address = 0xA5

Bit

Name

Function

7:0 P1MDOUT[7:0] Output Configuration Bits for P1.7–P1.0 (respectively).

These bits control the digital driver even when the corresponding bit in register

P1MDIN is logic 0.

0: Corresponding P1.n Output is open-drain.

1: Corresponding P1.n Output is push-pull.

Note: Pin P1.7 is only available in 32-pin devices.

234

Rev. 1.3

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