C8051F38C-GMR 查看數據表（PDF） - Silicon Laboratories

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C8051F38C-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

the incoming slave address. Additionally, if the GCn bit in register SMBnADR is set to 1, hardware will rec-

ognize the General Call Address (0x00). Table 22.4 shows some example parameter settings and the

slave addresses that will be recognized by hardware under those conditions.

Table 22.4. Hardware Address Recognition Examples (EHACK = 1)

Hardware Slave Address

SLVn[6:0]

0x34

0x34

0x34

0x34

0x70

Slave Address Mask

SLVMn[6:0]

0x7F

0x7F

0x7E

0x7E

0x73

GCn bit Slave Addresses Recognized by

Hardware

0

0x34

1

0x34, 0x00 (General Call)

0

0x34, 0x35

1

0x34, 0x35, 0x00 (General Call)

0

0x70, 0x74, 0x78, 0x7C

SFR Definition 22.6. SMB0ADR: SMBus0 Slave Address

Bit

7

6

5

4

3

2

1

0

Name

SLV0[6:0]

GC0

Type

R/W

R/W

Reset

0

0

0

0

0

0

0

0

SFR Address = 0xCF; SFR Page = 0

Bit

Name

Function

7:1 SLV0[6:0] SMBus Hardware Slave Address.

Defines the SMBus0 Slave Address(es) for automatic hardware acknowledge-

ment. Only address bits which have a 1 in the corresponding bit position in

SLVM0[6:0] are checked against the incoming address. This allows multiple

addresses to be recognized.

0

GC0

General Call Address Enable.

When hardware address recognition is enabled (EHACK0 = 1), this bit will deter-

mine whether the General Call Address (0x00) is also recognized by hardware.

0: General Call Address is ignored.

1: General Call Address is recognized.

218

Rev. 1.4

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