CS61880-IB 查看數據表（PDF） - Cirrus Logic

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CS61880-IB

Octal E1 Line Interface Unit

Cirrus Logic 

CS61880

19.10 Switching Characteristics - Serial Port

Parameter

Symbol

Min.

Typ.

Max

Unit

SDI to SCLK Setup Time

SCLK to SDI Hold Time

SCLK Low Time

SCLK High Time

SCLK Rise and Fall Time

CS to SCLK Setup Time

SCLK to CS Hold Time

CS Inactive Time

SDO Valid to SCLK

CS to SDO High Z

tdc

-

20

-

ns

tcdh

-

20

-

ns

tcl

-

50

-

ns

tch

-

50

-

ns

tr, tf

-

15

-

ns

tcc

-

20

-

ns

Note 21

tcch

-

20

-

ns

tcwh

-

70

-

ns

Note 21

tcdv

-

60

-

ns

tcdz

-

50

-

ns

Notes: 21. If SPOL = 0, then CS should return high no sooner than 20 ns after the 16th rising edge of SCLK during

a serial port read.

CS

SCLK

SDI

SDO

CLKE=0

SDO

CLKE=1

LAST ADDR BIT

tcdv

tcdv

D0

D1

D6

D0

D1

D6

Figure 23. Serial Port Read Timing Diagram

D7

D7

tcdz

HIGH Z

CS

tcc tch

tcl

tcwh

tcch

SCLK

tdc

SDI

LSB

tcdh

LSB

tcdh

MSB

Figure 24. Serial Port Write Timing Diagram

60

DS450PP2

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