CS4385(2004) Просмотр технического описания (PDF) - Cirrus Logic

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производитель

CS4385
(Rev.:2004)

114 dB, 192 kHz 8-Channel D/A Converter

Cirrus Logic 

CS4385

3.13.3 SPI Mode

In SPI mode, data is clocked into the serial control data line, CDIN, by the serial control

port clock, CCLK (see Figure 27 for the clock to data relationship). There is no AD0 pin.

Pin CS is the chip select signal and is used to control SPI writes to the control port. When

the device detects a high to low transition on the AD0/CS pin after power-up, SPI mode

will be selected. All signals are inputs and data is clocked in on the rising edge of CCLK.

3.13.3.1 SPI Write

To write to the device, follow the procedure below while adhering to the control port

Switching Specifications in Section 2.

1) Bring CS low.

2) The address byte on the CDIN pin must then be 00110000.

3) Write to the memory address pointer, MAP. This byte points to the register to be writ-

ten.

4) Write the desired data to the register pointed to by the MAP.

5) If the INCR bit (see section 3.13.1) is set to 1, repeat the previous step until all the

desired registers are written, then bring CS high.

6) If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is

necessary to bring CS high, and follow the procedure detailed from step 1. If no further

writes to other registers are desired, bring CS high.

CS

CCLK

C D IN

CHIP

ADDRESS

0011000

MAP

DATA

R /W

MSB

LSB

byte 1 byte n

M AP = M em ory Address Pointer

Figure 27. Control Port Timing, SPI mode

DS671A1

33

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