CS8416-CS 데이터 시트보기 (PDF) - Cirrus Logic

부품명

상세내역

제조사

CS8416-CS

192 kHz Digital Audio Interface Receiver

Cirrus Logic 

CS8416

10 HARDWARE MODE

The CS8416 has a hardware mode which allows using the device without a microcontroller. Hardware

mode is selected by connecting the 47K pull-up/down resistor on the SDOUT pin to ground. Various pins

change function in hardware mode, described in the hardware mode pin definition section (Section 11).

Hardware mode data flow is shown in Figure 13. Audio data is input through the AES3/SPDIF receiver,

and routed to the serial audio output port. The decoded C and U bits are also output, clocked at both edges

of OLRCK (master mode only, see Figure 9).

An error in the incoming audio stream will be indicated on the NV/RERR. This pin can be configured in

one of two ways. If RERR is chosen by pulling NV/RERR to ground, the previous audio sample is held

and passed to the serial audio output port if the validity bit is high, or a parity, bi-phase, confidence or PLL

lock error occurs during the current sample. If NVERR is chosen by pulling NV/RERR to VL+, only par-

ity, bi-phase, confidence or PLL lock error cause the previous audio sample to be held.

10.1 Serial Audio Port Formats

In hardware mode, only a limited number of alternative serial audio port formats are available. Table 4 de-

fines the equivalent software mode bit settings for each format.

The start-up options, shown in Table 4, allow choice of the serial audio output port as a master or slave,

and the serial audio port format.

RXSEL[1:0] TXSEL[1:0]

RXP0

RXP1

RXP2

RXP3

RXN

4:2

MUX

AES3 Rx

&

Decoder

OMCK

De-emphasis

Filter

TX

Serial

Audio

Output

OLRCK

OSCLK

SDOUT

C

U

RMCK NV/RERR 96kHz AUDIO RCBL

Power supply pins (VA+, VD+, VL+, AGND, DGND, the reset pin (RST) and the PLL filter pin (FILT)

are omitted from the diagram. Please refer to the Typical Connection Diagram for connection details.

Figure 13. Hardware Mode Data Flow

DS578PP2

37

Share Link: