CS44L10 データシートの表示（PDF） - Cirrus Logic

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CS44L10

Digital PWM Headphone Monitor

Cirrus Logic 

CS44L10

LRCK

(kHz)

MCLK/

LRCK

MCLK

(MHz)

PWM

Switching

Freq. (kHz)

48

256

48

384

48

512

44.1

256

44.1

384

44.1

512

32

1024

24

1024

12

2048

8

1536

8

2304

8

3072

12.288

18.432

24.576

11.2896

16.9344

22.5792

32.768

24.576

24.576

12.288

18.432

24.576

384

352.8

512

384

Table 12. Single Speed Clock Modes - Stand-Alone Mode

LRCK

(kHz)

96

96

96

DBS = 1

MCLKDIV = 0

DBS = 1

MCLKDIV = 1

MCLK/

LRCK

128

192

256

MCLK

(MHz)

MCLK/

LRCK

MCLK

(MHz)

FRQSFT1 FRQSFT0 CLKDIV1

12.288

256

24.576

0

0

0

18.432

384

36.864

0

0

0

24.576

512

49.152

0

0

1

Table 13. Double Speed Clock Modes - Control Port Mode

PWM

Switching

CLKDIV0 Freq. (kHz)

0

1

384

0

LRCK

(kHz)

MCLK/

LRCK

MCLK

(MHz)

PWM

Switching

Freq. (kHz)

96

128

12.288

384

96

192

18.432

Table 14. Double Speed Clock Modes - Stand-Alone Mode

4.9.5 DE-EMPHASIS CONTROL (DEM)

Default = 00

00 - Disabled

01 - 44.1 kHz

10 - 48 kHz

11 - 32 kHz

Function:

Selects the appropriate digital filter to maintain the standard 15 µs/50 µs digital de-emphasis filter re-

sponse at 32, 44.1 or 48 kHz sample rates (see Figure 6).

Note: De-emphasis is not available in double speed mode.

22

DS541PP1

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