CS8416-CS データシートの表示（PDF） - Cirrus Logic

部品番号

コンポーネント説明

メーカー

CS8416-CS

192 kHz Digital Audio Interface Receiver

Cirrus Logic 

CS8416

11 PIN DESCRIPTION - HARDWARE MODE

RXP3 1

RXP2 2

RXP1 3

RXP0 4

RXN 5

VA+ 6

AGND 7

FILT 8

RST 9

RXSEL1 10

RXSEL0 11

TXSEL1 12

TXSEL0 13

NV/RERR 14

28 OLRCK

27 OSCLK

26 SDOUT

25 OMCK

24 RMCK

23 VD+

22 DGND

21 VL+

20 TX

19 C

18 U

17 RCBL

16 96 KHZ

15 AUDIO

RXP[3:0]

RXN

VD+

VA+

VL+

DGND

AGND

RX_SEL0

RX_SEL1

TX_SEL0

TX_SEL1

FILT

RST

NV/RERR

1 Additional AES3/SPDIF Receiver Port (Input) - Single-ended receiver inputs carrying AES3 or

2 S/PDIF digital data. These inputs comprise the 4:2 S/PDIF Input Multiplexer. The select line control is

3 the RXSEL[1:0] pins. Please note that any unused inputs can be left floating. See Appendix A for rec-

4 ommended input circuits.

5 AES/SPDIF Input - Used along with RXP[X] to form an AES3 differential input. In single-ended

operation this should be capacitively coupled to ground.

23 Positive Digital Power – 3.3 V

6 Positive Analog Power –3.3 V

21 Positive Interface Power – 3.3 V – 5.0 V

22 Digital/Interface Ground

7 Analog Ground

10 Receiver_MUX Selector (Input) - used to select which pin, RXP[3:0], is used for the receiver

11 input.

12 TX Pin MUX SELECTION(Input) - used to select which pin, RXP[3:0], is used for the TX pin

13 output.

8 PLL Filter Pin – A RC network should be connected from this pin to AGND. For best PLL jitter

performance, this pin should be returned directly to the AGND pin

9 RESET(Input) – active low input . Resets CS8416 to default state, configuration pins are read on the

rising edge of this pin

14 Non-Validity Receiver Error/Receiver Error (output)

38

DS578PP2

Share Link: