ST92F150CV1T3 Datasheet - STMicroelectronics

GENERAL DESCRIPTION
INTRODUCTION
The ST92124-Auto/150-Auto/250-Auto microcontroller is developed and manufactured by STMicroelectronics using a proprietary n-well HCMOS process. Its performance derives from the use of a flexible 256-register programming model for ultrafast context switching and real-time event response. The intelligent on-chip peripherals offload the ST9 core from I/O and data management processing tasks allowing critical application tasks to get the maximum use of core resources. The new-generation ST9 MCU devices now also support low power consumption and low voltage operation for power-efficient and low-cost embedded systems.

■ Memories
    – Internal Memory: Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulated EEPROM)
    – In-Application Programming (IAP)
    – 224 general purpose registers (register file) available as RAM, accumulators or index pointers
■ Clock, Reset and Supply Management
    – Register-oriented 8/16 bit CORE with RUN, WFI, SLOW, HALT and STOP modes
    – 0-24 MHz Operation (Int. Clock), 4.5-5.5 V range
    – PLL Clock Generator (3-5 MHz crystal)
    – Minimum instruction time: 83 ns (24 MHz int. clock)
■ Up to 80 I/O pins
■ Interrupt Management
    – 4 external fast interrupts + 1 NMI
    – Up to 16 pins programmable as wake-up or additional external interrupt with multi-level interrupt handler
■ DMA controller for reduced processor overhead
■ Timers
    – 16-bit Timer with 8-bit Prescaler, and Watchdog Timer (activated by software or by hardware)
    – 16-bit Standard Timer that can be used to generate a time base independent of PLL Clock Generator
    – Two 16-bit independent Extended Function Timers (EFTs) with Prescaler, up to two Input Captures and up to two Output Compares
    – Two 16-bit Multifunction Timers, with Prescaler, up to two Input Captures and up to two Output Compares
■ Communication Interfaces
    – Serial Peripheral Interface (SPI) with Selectable Master/Slave mode
    – One Multiprotocol Serial Communications Interface with asynchronous and synchronous capabilities
    – One asynchronous Serial Communications Interface with 13-bit LIN Synch Break generation capability
    – J1850 Byte Level Protocol Decoder (JBLPD)
    – Up to two full I²C multiple Master/Slave Interfaces supporting Access Bus
    – Up to two CAN 2.0B Active interfaces
■ Analog peripheral (low current coupling)
    – 10-bit A/D Converter with up to 16 robust input channels
■ Development Tools
    – Free High performance Development environment (IDE) based on Visual Debugger, Assembler, Linker, and C-Compiler; Real Time Operating System (OSEK OS, CMX) and CAN drivers
    – Hardware Emulator and Flash Programming Board for development and ISP Flasher for production