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MC9S08MP12E2MLF Datasheet - Freescale Semiconductor

MC9S08MP16 image

Part Name
MC9S08MP12E2MLF

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36 Pages

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MFG CO.
Freescale
Freescale Semiconductor 

Features
• 8-Bit HCS08 Central Processor Unit (CPU)
   – Up to 51.34 MHz CPU at 2.7V to 5.5V across temperature
      range of –40°C to 105°C
   – Up to 40 MHz CPU at 2.7V to 5.5V across temperature range
      of –40°C to 125°C
   – HC08 instruction set with added BGND instruction and
      additional addressing modes for LDHX and STHX
   – Support for up to 48 interrupt/reset sources
• On-Chip Memory
   – Up to 16 KB flash memory; read/program/erase over full
      operating voltage and temperature
   – Up to 1 KB random-access memory (RAM)
   – Security circuitry to prevent unauthorized access to RAM and
      flash memory contents
• Power-Saving Modes
   – Two low power stop modes; reduced power wait mode
   – Peripheral clock gating can disable clocks to unused modules
• Clock Source Options
   – Oscillator (XOSC) — Loop-control Pierce oscillator; Crystal
      or ceramic resonator range of 31.25–38.4 kHz or 1–16 MHz
   – Internal Clock Source (ICS) — Containing a
      frequency-locked-loop (FLL) controlled by internal or
      external reference; precision trimming of internal reference
      allows 0.2% resolutions and 2% deviation over temperature
      and voltage; supports CPU frequencies up to 51.34 MHz
• System Protection
   – Watchdog computer operating properly (COP) reset running
      from dedicated 1-kHz internal clock source or bus clock
   – Low-voltage detection with reset or interrupt; selectable trip
      points
   – Illegal opcode and illegal address detection with reset
   – Flash memory block protection
• Development Support
   – Single-wire background debug interface
   – Breakpoint capability to allow single breakpoint setting during
      in-circuit debugging (plus three more breakpoints in on-chip
      debug module)
   – On-chip in-circuit emulator (ICE) debug module containing
      three comparators and nine trigger modes. Eight deep FIFO for
      storing change-of-flow addresses and event-only data. Debug
      module supports both tag and force breakpoints
(Continue ...)


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