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M95P32-E Datasheet - STMicroelectronics

M95P32-I image

Part Name
M95P32-E

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70 Pages

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2 MB

MFG CO.
ST-Microelectronics
STMicroelectronics 

Description
   The M95P32-I and M95P32-E are manufactured with STs advanced proprietary NVM technology. They offer byte flexibility, page alterability, high page cycling performance, and ultra-low power consumption, equivalent to that of EEPROM technology.
   The M95P32-I and M95P32-E are a 32-Mbit SPI page EEPROM device organized as 8192 programmable pages of 512 bytes each, accessed through an SPI bus with high-performance dual- and quad-SPI outputs.

The device offers two additional (identification) pages of 512 bytes:
• The first contains identification data and, upon request, the UID.
• The second can be used to store sensitive application parameters, which can (later) be permanently locked in read-only mode.

   Additional status, configuration, and volatile registers set the desired device configuration, while the safety register gives device status information.
   The M95P32-I operates with a supply voltage from 1.6 to 3.6 V over an ambient temperature range of -40 °C to +85 °C (+105 °C for the extended range). The M95P32-E offers an extended range of temperature of -40°C to +105 °C. The device supports a clock frequency of up to 80 MHz.

   The M95P32-I and M95P32-E offer byte and page write instructions of up to 512 bytes. Write instructions consist of self-timed auto erase and program operations, resulting in flexible data byte management.
   The devices also accept page/block/sector/chip erase commands in order to set the memory to an erased state.
   The memory can then be fast-programmed by pages of 512 bytes, and further optimized using the "page program with buffer load" to hide the SPI communication latency.


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