M48Z128 Datasheet - STMicroelectronics

DESCRIPTION
The M48Z128/128Y ZEROPOWER RAM is a 128 Kbit x8 non-volatile static RAM that integrates power-fail deselect circuitry and battery control logic on a single die. The monolithic chip is available in two special packages to provide a highly integrated battery backed-up memory solution.
   
■ INTEGRATED LOW POWER SRAM,
    POWER-FAIL CONTROL CIRCUIT and
    BATTERY
■ CONVENTIONAL SRAM OPERATION;
    UNLIMITED WRITE CYCLES
■ 10 YEARS of DATA RETENTION in the
    ABSENCE of POWER
■ AUTOMATIC POWER-FAIL CHIP DESELECT
    and WRITE PROTECTION
■ WRITE PROTECT VOLTAGES
    (VPFD = Power-fail Deselect Voltage):
    – M48Z128: 4.50V ≤ VPFD ≤ 4.75V
    – M48Z128Y: 4.20V ≤ VPFD ≤ 4.50V
■ BATTERY INTERNALLY ISOLATED UNTIL
    POWER IS APPLIED
■ PIN and FUNCTION COMPATIBLE with
    JEDEC STANDARD 128K x 8 SRAMs
■ SURFACE MOUNT CHIP SET PACKAGING
    INCLUDES a 28-PIN SOIC and a 32-LEAD
    TSOP (SNAPHAT TOP TO BE ORDERED
    SEPARATELY)
■ SOIC PACKAGE PROVIDES DIRECT
    CONNECTION for a SNAPHAT TOP WHICH
    CONTAINS the BATTERY
■ SNAPHAT HOUSING (BATTERY) IS
    REPLACEABLE