Introduction
Unless otherwise indicated throughout the rest of this document, the Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC) device is referred to as J3 65 nm SBC.
This document contains information pertaining to the Numonyx® Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC) device features, operation, and specifications.
Product Features
◾ Architecture
— Symmetrical 128-KB blocks
— 128 Mbit (128 blocks)
— 64 Mbit (64 blocks)
— 32 Mbit (32 blocks)
— Blank Check to verify an erased block
◾ Performance
— Initial Access Speed: 75ns
— 25 ns 8-word Asynchronous page-mode
reads
— 256-Word write buffer for x16 mode, 256-
Byte write buffer for x8 mode;
1.41 µs per Byte Effective programming
time
◾ System Voltage
— VCC = 2.7 V to 3.6 V
— VCCQ = 2.7 V to 3.6 V
◾ Packaging
— 56-Lead TSOP
— 64-Ball Easy BGA package
◾ Security
— Enhanced security options for code
protection
— Absolute protection with VPEN = Vss
— Individual block locking
— Block erase/program lockout during power
transitions
— Password Access feature
— One-Time Programmable Register:
64 OTP bits, programmed with unique
information by Numonyx
64 OTP bits, available for customer
programming
◾ Software
— Program and erase suspend support
— Numonyx® Flash Data Integrator (FDI)
— Common Flash Interface (CFI) Compatible
— Scalable Command Set
◾ Quality and Reliability
— Operating temperature:
-40 °C to +85 °C
— 100K Minimum erase cycles per block
— 65 nm Flash Technology
— JESD47E Compliant