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CS5519AJ-I3 Datasheet - BCD Semiconductor

CS5519 image

Part Name
CS5519AJ-I3

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17 Pages

File Size
320.7 kB

MFG CO.
BCDSEMI
BCD Semiconductor 

General Description
   The CS5519 is a low-cost high-resolution single chip solution for APA capacitive touch screen. It is an 8-bit single cycle 8051 microcontroller with I2C Interface. The chip includes 8-bit successive approximation analog-to-digital converters with an I2C interface and multiplexer-switcher circuits for flexible measurement of analog signal from APA panel. An accurate switched-capacitor integrator is built-in and it can auto calibrate the pixel parameters for a wide range of capacitance on the touch screen (0.1pF to 4pF). On-chip capacitor can replace external component. This touch screen controller (TSC) with CMOS integration circuit provides an ideal choice for APA touch panel. The CS5519 is specified over the temperature range of -40°C to 95°C.
   The CS5519 is available in QFN-7×7-56 and QFN-8×8-68 packages.


FEATUREs
• Mutual Capacitive Touch Sensing
• Dual Power Supply: 2.8V to 3.6V Operation
   Voltage; 1.6V to 2.0V Operation Voltage
• Up to 38/30 Drive Lines and 22/17 Sense Lines
• Dedicated Internal Two-wire Serial Control Bus
   I2C and UART between CS5519 and Host
• Single-end Integrator with Programmable Gain
   Control and Offset Control
• Multiplexed Analog Digitization with Two 8-bit
   Resolution Odd/Even Scan SAR ADCs and Its
   Dedicated 2X to 8X Accumulator XSRAM
   Buffers

• Single Cycle 8051 CPU Core, Maximum 
   Operating Clock up to 24MHz from IOSC (Zero Wait
   State); 48MHz from IOSC(With Wait State)
   4MHz to 48MHz Internal Oscillator (IOSC)
   64K-byte Flash ROM
   256-byte Internal SRAM and 12032-byte
   XSRAM
   Extra XSRAMs for AFE:
   ✦ 896×12-bit×2 XSRAM for 8-bit SAR ADC
   ✦ 896×8-bit XSRAM for 8-bit Parasitical
      Capacitor Compensator
   Two 16-bit Timers T0/T1 and One 16-bit ECT
   Timer T2
   One I2C Slave Controller and One I2C Master
   Controller Shared with the Same Port
   ✦ With Asynchronous I2C Slave Address
      Detection Logic Design
   4 General Purpose GPIO Pins
   One External Interrupt Pin
   One UART Data Transfer Output Pin
• ISP/IAP via I²C Port
• Operation Temperature Range: -40°C to 95°C
• Package Types: QFN-7×7-56 and QFN-8×8-68
• RoHS Compliance
• Operating Mode:


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