CS5320 Datasheet - Applied Micro Circuits Corporation

ARCHITECTURAL OVERVIEW
   The AMCC S5320 was developed to provide the designer with a single multi-function device offering a flexible and easy way to connect to the PCI bus. By using the S5320, the designer eliminates the task of assuring PCI bus specification compliance and the necessity of understanding PCI bus timing requirements when interfacing a new application. The S5320 was designed for 3.3V environment but its inputs/outputs are tolerant to 5V signaling.

FEATURES
• Full 132 Mbytes/sec Transfer Rate
• PCI Bus Operation to 33 MHz
• PCI 2.2 Compliant Target Device
• 3.3V Power Supply
• 5V Tolerant I/Os
• Add-On Bus up to 40 MHz
• Programmable Prefetch and Wait States
• 8/16/32-Bit Add-On Bus
• Four Definable Pass-Thru Regions
• Two 32-Byte Burstable FIFOs
• Active/Passive Add-On Bus Operation
• Mailbox Registers/w Byte Level Status
• Direct Mailbox Data Strobe/Int Pin
• Mailbox Read/Write Interrupts
• Direct PCI and Add-On Interrupt Pins
• Plug-N-Play Compatible
• Two-wire Serial Bus nvRAM Support
• Optional External BIOS capability
• 176-Pin Low Profile LQFP
• Environmental Friendly Lead-free Package Option

APPLICATIONS
• ISA Conversions
• Multimedia
• I/O Ports
• Data Storage
• CODEC5
• General Purpose PCI Bus Interfacing