CS1221 Datasheet - Applied Micro Circuits Corporation

Overview
   The S1221 can be used to implement the front end of SONET/SDH equipment which consists primarily of the serial transmit interface and the serial receive interface. The Low Voltage LVDS or LVPECL interfaces guarantee compliance with the bit-error rate requirements of the Telcordia and ITU-T standards.

FEATUREs
• CMOS 0.13 micron technology
• Complies with Bellcore and ITU-T 
   specifications for jitter tolerance, 
   jitter transfer, and jitter generation
• On-chip high-frequency PLLs for clock 
   generation and clock recovery
• Supports Data Rates for 155.52 Mbps (OC-3)
   and 622.08 Mbps (OC-12)
• 8-bit LVCMOS Parallel data path
• LVDS or LVPECL differential serial interface
• Internal termination of the optic’s LVPECL
   driver renders a seamless power saving connection
• Typical 715 mW power in LVDS I/O mode
• Directly compatible with 2.5 V or 3.3 V LVDS,
   3.3 V LVPECL (DC and AC)
• Frame and Byte Boundary Detection option
• 255 PBGA Package,17x17 mm2 with Green/
   RoHS compliant lead free option
• 1.2 V and 3.3 V/2.5 V supply
• Receiver lock detect outputs
• Signal detect inputs
• Selectable reference frequencies of 19.44,
   77.76 or 155.52 MHz
• Internal FIFO to decouple transmit clocks
• Various diagnostic loopback modes
• Quad configuration, mixed OC-3/OC-12
• Built-In Self Test (BIST) Feature
• Independent power down of unused channels
• Drop-in-replacement for S1213

APPLICATIONs
• SONET/SDH OC-3/OC-12
• SONET/SDH modules
• SONET/SDH test equipment
• ATM over SONET/SDH
• Section repeaters
• Add Drop Multiplexers (ADM)
• Broad-band cross-connects
• Fiber optic terminators
• Fiber optic test equipment