74V2T04(2003) Datasheet - STMicroelectronics

DESCRIPTION
The 74V2T04 is an advanced high-speed CMOS TRIPLE INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.
Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V.

■ HIGH SPEED: tPD = 4.7ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C
■ COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX)
■ POWER DOWN PROTECTION ON INPUT
■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V
■ IMPROVED LATCH-UP IMMUNITY