74ACT573 Datasheet - STMicroelectronics

DESCRIPTION
The 74ACT573 is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
These 8 bit D-Type latch are controlled by a latch enable input (LE) and an output enable input (OE). While the LE inputs is held at a high level, the Q outputs will follow the data input .

■ HIGH SPEED: tPD = 5ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION:
   ICC = 4µA(MAX.) at TA=25°C
■ COMPATIBLE WITH TTL OUTPUTS
   VIH = 2V (MIN.), VIL = 0.8V (MAX.)
■ 50Ω TRANSMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 24mA (MIN)
■ BALANCED PROPAGATION DELAYS:
   tPLH = tPHL
■ OPERATING VOLTAGE RANGE:
   VCC (OPR) = 4.5V to 5.5V
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 573
■ IMPROVED LATCH-UP IMMUNITY