74AC16373 Datasheet - STMicroelectronics

DESCRIPTION
The 74AC16373 CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:
   tPD = 5.0 ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION:
   ICC = 8µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY:
   VNIH = VNIL = 28 % VCC (MIN.)
■ 50Ω TRASMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 24mA (MIN)
■ OPERATING VOLTAGE RANGE:
   VCC (OPR) = 2V to 6V
■ IMPROVED LATCH-UP IMMUNITY