CS8900-CQ View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS8900-CQ

Highly-Integrated ISA Ethernet Controller

Cirrus Logic 

CS8900

Extended Range: The CS8900 supports an Ex-

tended Range feature that reduces the 10BASE-T

receive squelch threshold by approximately 6

dB. This allows the CS8900 to operate with

10BASE-T cables that are longer than 100 me-

ters (100 meters is the maximum length specified

by the Ethernet standard). The exact additional

distance depends on the quality of the cable and

the amount of electro-magnetic noise in the sur-

rounding environment. To activate this feature,

the host must set the LoRxSquelch bit (Register

13, LineCTL, Bit E).

The state of the link segment is reported in the

LinkOK bit (Register 14, LineST, Bit 7). If the

HC0E bit (Register 15, SelfCTL, Bit D) is clear,

it is also indicated by the output of the

LINKLED pin. If the link is "good", the LinkOK

bit is set and the LINKLED pin is driven low. If

the link is "bad" the LinkOK bit is clear and the

LINKLED pin is high. To disable this feature,

the host must set the DisableLT bit (Register 19,

TestCTL, Bit 7). If DisableLT is set, the CS8900

will transmit and receive packets independent of

the link segment.

Link Pulse Detection

Receive Polarity Detection and Correction

To prevent disruption of network operation due

to a faulty link segment, the CS8900 continually

monitors the 10BASE-T receive pair (RXD+/

RXD-) for packets and link pulses. After each

packet or link pulse is received, an internal Link-

Loss timer is started. As long as a packet or link

pulse is received before the Link-Loss timer fin-

ishes (between 25 and 150 ms), the CS8900

maintains normal operation. If no receive activity

is detected, the CS8900 disables packet transmis-

sion to prevent "blind" transmissions onto the

network (link pulses are still sent while packet

transmission is disabled). To reactivate transmis-

sion, the receiver must detect a single packet (the

packet itself is ignored), or two link pulses sepa-

rated by more than 2 to 7 ms and no more than

25 to 150 ms (see section 10.0 for 10BASE-T

timing).

The CS8900 automatically checks the polarity of

the receive half of the twisted pair cable. If the

polarity is correct, the PolarityOK bit (Register

14, LineST, bit C) is set. If the polarity is re-

versed, the PolarityOK bit is clear. If the

PolarityDis bit (Register 19, TestCTL, Bit C) is

clear, the CS8900 automatically corrects a rever-

sal. If the PolarityDis bit is set, the CS8900 does

not correct a reversal. The PolarityOK bit and

the PolarityDis bit are independent.

To detect a reversed pair, the receiver examines

received link pulses and the End-of-Frame

(EOF) sequence of incoming packets. If it de-

tects at least one reversed link pulse and at least

four frames in a row with negative polarity after

the EOF, the receive pair is considered reversed.

Any data received before the correction of the

reversal is ignored.

Time

Packet

Packet

Link

Pulse

Link

Pulse

less than

16 ms

16 ms

Figure 3.11. Link Pulse Transmission

16 ms

DS150PP2

33

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