Reset Output
AT89C51CC03
As detailed in Section “Watchdog Timer”, page 82, the WDT generates a 96-clock
period pulse on the RST pin. In order to properly propagate this pulse to the rest of the
application in case of external capacitor or power-supply supervisor circuit, a 1 kΩ resis-
tor must be added as shown Figure 18.
Figure 18. Recommended Reset Output Schematic
VDD
+
RST
VDD
1K
AT89C51CC03
RST
VSS
To other
on-board
circuitry
33
4182K–CAN–05/06