C8051F521-C-IM View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

C8051F521-C-IM

8/4/2 kB ISP Flash MCU Family

Silicon Laboratories 

C8051F52x/F53x

Figure 3.2. DFN-10 Package Diagram

Table 3.2. DFN-10 Package Diagram Dimensions

Dimension

Min

Nom

Max

A

0.80

0.90

1.00

A1

0.00

0.02

0.05

b

0.18

0.25

0.30

D

3.00 BSC.

D2

1.50

1.65

1.80

e

0.50 BSC.

E

3.00 BSC.

E2

2.23

2.38

2.53

L

0.30

0.40

0.50

L1

0.00

—

0.15

aaa

—

—

0.15

bbb

—

—

0.15

ddd

—

—

0.05

eee

—

—

0.08

Notes:

1. All dimensions shown are in millimeters (mm) unless otherwise noted.

2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.

3. This drawing conforms to JEDEC outline MO-220, variation VEED except for

custom features D2, E2, and L, which are toleranced per supplier designation.

4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification

for Small Body Components.

38

Rev. 1.4

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