CS5376-BS View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5376-BS

Low Power Multi-Channel Decimation Filter

Cirrus Logic 

CS5376

∆−Σ Modulators

CLK

SYNC

Input

Amp

2

CS5372

MCLK

SPI

µC

Input

Amp

MSYNC

2

CS5376

GPIO

GPIO

2

Input

Amp

SD

Communications

Interface

To

System

Master

CS5372

Input

Amp

2

GPIO

∆−Σ

Modulator

TSBCLK

TSBDATA

Figure 3. CS5376 System Level Block Diagram

2. GENERAL DESCRIPTION

The CS5376 is a multi-channel digital filter with

integrated system peripherals. The digital decima-

tion filter uses a coefficient programmable signal

processing architecture to filter up to four ∆−Σ

modulator bit streams. An on-chip reference coef-

ficient set is included to provide an easy set up for

applications that do not require custom digital filter

coefficients.

The CS5376 integrated peripherals simplify system

design by providing a buffered high speed serial

data output port, a test bit stream generator suitable

for driving a test DAC, general purpose I/O pins for

local hardware control, a secondary master mode

SPI port for serial peripherals, and a JTAG port for

boundary scan testing. In addition, a clock and syn-

chronization block synchronizes the CS5376 to the

host system, and a time break controller generates

timing reference information in the output data

stream.

2.1 System Configurations

Coprocessor or Stand-Alone Configurations

Figure 3 illustrates a simplified block diagram of

the CS5376 in a multi-channel system architecture.

This diagram shows the CS5376 in coprocessor

mode, where an external microcontroller operates

as the local host. The microcontroller writes con-

figuration commands and filter coefficients into the

CS5376 from non-volatile memory or from the

communications channel. This system configura-

tion allows the microcontroller to change the filter-

ing function of the CS5376 when instructed to do

so by the system controller.

DS256PP1

8

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