Data Sheet
AD7871/AD7872
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa ± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation terms are those for which
neither m nor n are equal to zero. For example, the second
order terms include (fa + fb) and (fa – fb), while the third order
terms include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb).
Using the CCIF standard where two input frequencies near the
top end of the input bandwidth are used, the second- and third-
order terms are of different significance. The second-order
terms are usually distanced in frequency from the original sine
waves while the third-order terms are usually at a frequency
close to the input frequencies. As a result, the second- and
third-order terms are specified separately. The calculation of the
intermodulation distortion is as per the THD specification,
where it is the ratio of the rms sum of the individual distortion
products to the rms amplitude of the fundamental expressed in
decibels. In this case, the input consists of two, equal amplitude,
low distortion sine waves. Figure 21 shows a typical IMD plot
for the AD7871/AD7872.
0
INPUT FREQUENCIES
F1 = 9.21kHz
F2 = 9.51kHz
SAMPLE FREQUENCY = 60kHz
–30
TA = 25°C
IMD
ALL TERMS = –90.85dB
2ND ORDER TERM = –92.38dB
–60
3RD ORDER TERM = –96.12dB
–90
Parallel Read Interfacing
Figure 22 and Figure 23 show interfaces to two different DSP
processors types. The AD7871 is operating in Mode 1, parallel
read for both interfaces. An external timer controls conversion
start asynchronously to the microprocessor. At the end of each
conversion the ADC BUSY/INT interrupts the microprocessor
and the conversion result is read from the ADC with the
following instruction:
DSP 1 MR0 = DM(ADC)
DSP 2: IN D,ADC
MR0 = DSP 1 MR0 Register
D = Data Memory Address
ADC = AD7871 Address
DMA14
DMA0
TIMER
ADDRESS BUS
DSP 1
AD7871*
DMS
IRQn
DMRD
ADDR
DECODE
EN
CONVST
CS
5V
14/8/CLK
BUSY/INT
RD
DMD15
DMD0
DB13
DB0
DATA BUS
*ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 22. AD7871 to DSP 1 Parallel Interface
–120
0
10
20
30
FREQUENCY (kHz)
Figure 21. IMD Plot
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification will be
determined by the largest harmonic in the spectrum, but for
parts where the harmonics are buried in the noise floor, peak
will be a noise peak.
MICROPROCESSOR INTERFACE
The AD7871/AD7872 have a wide variety of interfacing
options. The AD7871 offers two operating modes and three
data-output formats, while the AD7872 is a dedicated serial
output device. The fast data access times on the parallel modes
of the AD7871 allow interfacing to the very fast DSPs. The
serial mode on both the AD7871 and AD7872 is compatible
with the serial port structures on all the popular DSPs.
TIMER
A15
A0 ADDRESS BUS
DSP 2
IS
INTn
STRB
R/W
D15
D0
ADDR
DECODE
EN
AD7871*
CONVST
CS
5V
14/8/CLK
BUSY/INT
RD
DB13
DB0
DATA BUS
*ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 23. AD7871 to DSP 2 Interface
Some applications may require that conversions be initiated by
the microprocessor rather than an external timer. One option is
to decode the AD7871 CONVST from the address bus so that a
write operation to the ADC starts a conversion. Data is read at
the end of conversion as described previously. Note that a read
operation must not be attempted during conversion.
Rev. E | Page 15 of 24