SST39VF1602C-70-4C-MAKE View Datasheet(PDF) - Silicon Storage Technology

Part Name

Description

MFG CO.

SST39VF1602C-70-4C-MAKE

16 Mbit (x16) Multi-Purpose Flash Plus

Silicon Storage Technology 

A Microchip Technology Company

16 Mbit Multi-Purpose Flash Plus

SST39VF1601C / SST39VF1602C

Data Sheet

SIX-BYTE CODE FOR BLOCK-ERASE

TBE

ADDRESSES

555

2AA

555

555

2AA

BAX

CE#

OE#

WE#

RY/BY#

TWP

TBY

TBR

DQ15-0

XXAA XX55

XX80 XXAA XX55

XX30

VALID

Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are inter-

changeable as long as minimum timings are met. (See Table 18).

BAX = Block Address

WP# must be held in proper logic state (VIL or VIH) 1µs prior to and 1µs after the command sequence.

X can be VIL or VIH, but no other value.

1380 F32.0

Figure 12:WE# Controlled Block-Erase Timing Diagram

SIX-BYTE CODE FOR SECTOR-ERASE

TSE

ADDRESSES

555

2AA

555

555

2AA

SAX

CE#

OE#

WE#

RY/BY#

TWP

TBY

TBR

DQ15-0

XXAA XX55

XX80 XXAA XX55

XX50

VALID

1380 F28.0

Note: This device also supports CE# controlled Sector-Erase operation. The WE# and CE# signals are interchangeable

as long as minimum timings are met. (See Table 18).

SAX = Block Address

WP# must be held in proper logic state (VIL or VIH) 1µs prior to and 1µs after the command sequence.

X can be VIL or VIH, but no other value.

Figure 13:WE# Controlled Sector-Erase Timing Diagram

©2011 Silicon Storage Technology, Inc.

24

DS-25018A

05/11

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