CS42L56 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS42L56

Ultralow Power, Stereo Codec with Class H Headphone Amp

Cirrus Logic 

CS42L56

6.10 Status (Address 0Ah) (Read Only)

Bits [6:0] in this register are “sticky”. 1b means the associated error condition has occurred at least once

since the register was last read. 0b means the associated error condition has NOT occurred since the last

reading of the register. Reading the register resets these bits to 0. Bit 7 is not “sticky” and will always indicate

current status when the register is read.

7

HPDETECT

6

SPCLKERR

5

DSPBOVFL

4

DSPAOVFL

3

MIXBOVFL

2

MIXAOVFL

1

ADCBOVFL

0

ADCAOVFL

6.10.1 HPDETECT Pin Status (Read Only)

Indicates the status of the HPDETECT pin.

HPDETECT

0

1

Pin State

Low

High

6.10.2 Serial Port Clock Error (Read Only)

Indicates the status of the MCLK to LRCK ratio.

SPCLKERR

0

1

Application:

Serial Port Clock Status:

MCLK/LRCK ratio is valid.

MCLK/LRCK ratio is not valid.

“Serial Port Clocking” on page 47

Note: On initial power up and application of clocks, this bit will report 1b as the serial port re-synchro-

nizes.

6.10.3 DSP Engine Overflow (Read Only)

Indicates the over-range status in the DSP data path.

DSPxOVFL

0

1

DSP Overflow Status:

No digital clipping has occurred in the data path after the DSP.

Digital clipping has occurred in the data path after the DSP.

6.10.4 MIXx Overflow (Read Only)

Indicates the over-range status in the PCM mix data path.

MIXxOVFL

0

1

PCM Overflow Status:

No digital clipping has occurred in the data path of the ADC and PCM mix of the DSP.

Digital clipping has occurred in the data path of the ADC and PCM mix of the DSP.

6.10.5 ADCx Overflow (Read Only)

Indicates the over-range status in the ADC signal path.

ADCxOVFL

0

1

ADC Overflow Status:

No clipping has occurred anywhere in the ADC signal path.

Clipping has occurred in the ADC signal path.

64

DS851F2

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