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STM8S105K4T3TR(2015) View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
STM8S105K4T3TR Datasheet PDF : 121 Pages
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Option byte
STM8S105x4/6
Option byte no.
OPT4
OPT5
OPT6
OPT7
OPTBL
Table 12. Option byte description (continued)
Description
EXTCLK: External clock selection
0: External crystal connected to OSCIN/OSCOUT
1: External clock signal on OSCIN
CKAWUSEL: Auto wake-up unit/clock
0: LSI clock source selected for AWU
1: HSE clock with prescaler selected as clock source for AWU
PRSC[1:0] AWU clock prescaler
0x: 16 MHz to 128 kHz prescaler
10: 8 MHz to 128 kHz prescaler
11: 4 MHz to 128 kHz prescaler
HSECNT[7:0]: HSE crystal oscillator stabilization time
0x00: 2048 HSE cycles
0xB4: 128 HSE cycles
0xD2: 8 HSE cycles
0xE1: 0.5 HSE cycles
Reserved
Reserved
BL[7:0]: Bootloader option byte
For STM8S products, this option is checked by the boot ROM code after
reset. Depending on the content of addresses 0x487E, 0x487F, and 0x8000
(reset vector), the CPU jumps to the bootloader or to the reset vector. Refer
to the UM0560 (STM8L/S bootloader manual) for more details.
For STM8L products, the bootloader option bytes are on addresses 0xXXXX
and 0xXXXX+1 (2 byte). These option bytes control whether the bootloader is
active or not. For more details, refer to the UM0560 (STM8L/S bootloader
manual) for more details.
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DocID14771 Rev 15

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