CS5490-ISZR View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS5490-ISZR Datasheet PDF : 56 Pages
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CS5490
6.6.15 Chip Status 2 (Status2) – Page 0, Address 25
23
22
21
20
19
18
17
-
-
-
-
-
-
-
15
14
13
12
11
10
9
-
-
-
-
-
-
-
7
6
5
4
3
2
1
-
-
QSUM_SIGN
-
Q_SIGN PSUM_SIGN
-
Default = 0x00 0000
This register indicates a variety of conditions within the chip.
[23:6]
QSUM_SIGN
[4]
Q_SIGN
PSUM_SIGN
[1]
P_SIGN
Reserved.
Indicates the sign of the value contained in QSUM.
0 = positive value
1 = negative value
Reserved.
Indicates the sign of the value contained in QAVG.
0 = positive value
1 = negative value
Indicates the sign of the value contained in PSUM.
0 = positive value
1 = negative value
Reserved.
Indicates the sign of the value contained in PAVG.
0 = positive value
1 = negative value
16
-
8
-
0
P_SIGN
6.6.16 Line to Sample Frequency Ratio (Epsilon) – Page 16, Address 49
MSB
LSB
-(20) 2-1
2-2
2-3
2-4
2-5
2-6
2-7
..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23
Default = 0x01 999A (0.0125 or 50Hz/4.0kHz)
Epsilon is the ratio of the input line frequency to the output word rate (OWR).
It can either be written by the application program or calculated automatically from the line frequency (from
the voltage channel input) using the AFC bit in the Config2 register. It is a two's complement value in the range
of -1.0 value 1.0, with the binary point to the right of the MSB. Negative values are not used.
40
DS982F2
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