PC48F2000P0VBQ0 View Datasheet(PDF) - Intel
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MFG CO.
PC48F2000P0VBQ0 Datasheet PDF : 102 Pages
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1-Gbit P30 Family
Table 18.
AC Write Specifications (Sheet 2 of 2)
Num Symbol
Parameter
Min
Max Units Notes
W14 tWHGL
W16 tWHQV
WE# high to OE# low
WE# high to read valid
0
-
tAVQV + 35
-
ns
1,2,9
ns
1,2,3,6,1
0
Write to Asynchronous Read Specifications
W18 tWHAV
WE# high to Address valid
Write to Synchronous Read Specifications
0
-
ns 1,2,3,6,8
W19 tWHCH/L
WE# high to Clock valid
W20 tWHVH
WE# high to ADV# high
Write Specifications with Clock Active
19
-
ns 1,2,3,6,1
19
-
ns
0
W21
W22
tVHWL
tCHWL
ADV# high to WE# low
Clock high to WE# low
-
20
ns
1,2,3,11
-
20
ns
Notes:
1.
Write timing characteristics during erase suspend are the same as write-only operations.
2.
A write operation can be terminated with either CE# or WE#.
3.
Sampled, not 100% tested.
4.
Write pulse width low (tWLWH or tELEH) is defined from CE# or WE# low (whichever occurs last) to
CE# or WE# high (whichever occurs first). Hence, tWLWH = tELEH = tWLEH = tELWH.
5.
Write pulse width high (tWHWL or tEHEL) is defined from CE# or WE# high (whichever occurs first) to
CE# or WE# low (whichever occurs last). Hence, tWHWL = tEHEL = tWHEL = tEHWL).
6.
tWHVH or tWHCH/L must be met when transitioning from a write cycle to a synchronous burst read.
7.
VPP and WP# should be at a valid level until erase or program success is determined.
8.
This specification is only applicable when transitioning from a write cycle to an asynchronous read.
See spec W19 and W20 for synchronous read.
9.
When doing a Read Status operation following any command that alters the Status Register, W14 is
20 ns.
10. Add 10 ns if the write operations results in a RCR or block lock status change, for the subsequent
read operation to reflect this change.
11. These specs are required only when the device is in a synchronous mode and clock is active during
address setup phase.
Figure 22. Write-to-Write Timing
Address [A]
W2
CE# [E}
WE# [W]
OE# [G]
Data [D/Q]
W1
RST# [P]
W5
W3
W4
W8
W6
W2
W9
W5
W3
W7
W4
W8
W6
W7
April 2005
42
Intel StrataFlash® Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
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